In recent years, new fine processing techniques have been developed along with high integration and high performance of large scale integration (LSI). A chemical mechanical polishing (hereinafter, also simply referred to as “CMP”) method is one of the techniques, and is a technique frequently used for planarization of an interlayer insulation film, metal plug formation, and buried wiring (damascene wiring) formation in an LSI production process, in particular, in a multilayer wiring forming process. The damascene wiring technique enables wiring process simplification and improvement in yield and reliability, and thus it is considered that application of the damascene wiring technique will hereafter increase.
The common method of CMP is as follows: a polishing pad is attached onto a circular polishing table (platen), the surface of the polishing pad is immersed with a polishing agent, a surface of a substrate, on which a metal film is formed, is pressed; the polishing platen is rotated while a predetermined pressure (hereinafter, also simply referred to as “polishing pressure”) is applied to the substrate from the back side thereof; and the metal film in projecting part is removed by the mechanical friction between the polishing agent and the projecting part of the metal film.
Incidentally, for the damascene wiring, copper is currently mainly used as a wiring metal since copper has low resistivity, and use of copper is considered to increase hereafter also in memory devices represented by a dynamic random access memory (DRAM). Further, in the lower layer of a conductive material (copper, a copper alloy, or the like), which forms damascene wiring, a barrier layer is formed in order to prevent the conductive material from diffusing into the interlayer insulation film. Examples of a material constituting the barrier layer, which is conventionally used, include tantalum, a tantalum alloy, and a tantalum compound (for example, JP 2001-85372 A and JP 2001-139937 A).
In recent years, with wiring miniaturization tendency, it is difficult to perform plating with copper in a favorable state, and a phenomenon that voids are generated (phenomenon that any substance is not present locally) occurs.
In this regard, in order to solve the above problems, recently, there is an attempt to compensate adhesiveness by using a layer containing a cobalt element or a cobalt compound, which is highly compatible with copper, between the barrier layer and copper.